Hamman’s Study Diary

October 8, 2007

Chapter 5 – Processing Unit Design

Filed under: CSC 232, Fall 2007 — Tags: , , , , — Hamman @ 6:27 pm

Areas covered:

a. CPU basics

b. Register set

c. Datapath

d. CPU instruction cycle

e. Control Unit

a. CPU basics: CPU components (register set, ALU, control unit); general-purpose and special-purpose registers; execution cycle; interrupts; micro-orders and microprogramming

b. Register Set: MAR; MDR; instruction fetching registers; condition registers; special-purpose registers (index registers, segment pointers, stack pointers); 8086 registers; MIPS registers

c. Datapath: 1-bus, 2-bus, 3-bus organization; analysis of execution cycle for the different organizations

d. CPU Instruction Cycle: Fetch instruction;


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